In February 2025, Indian prime minister Narendra Modi and U.S. president Donald Trump launched the Transforming the Relationship Utilizing Strategic Technology (TRUST) initiative, naming semiconductors as a core area for building trusted and resilient supply chains. Recently, India was invited to join the Pax Silica initiative launched by the U.S. government to coordinate artificial intelligence (AI) and semiconductor supply chain security amongst allies and trusted partners.

The U.S.–India semiconductor cooperation story is well-stocked with top-level strategic intent. What remains unresolved, however, are some underlying challenges that will determine whether the cooperation actually functions. Three such friction points stand out. First, the state of export control regimes on both sides. Second, the absence of a clearly articulated economic case for U.S.–India semiconductor cooperation. Third, a newly articulated anxiety on the U.S. side about India becoming a China-like strategic risk.

Export Controls

The United States and India are at different points in their export control trajectories, especially when it comes to regulating emerging technologies. While India’s export control architecture has evolved into a robust and internationally aligned framework, it has yet to accumulate the institutional depth and experience of the U.S. export control regime. As recently as October 2025, India introduced a specific product category for regulating the export of sensitive emerging technologies, including advanced semiconductors, integrated circuits, related software and know-how under its formal licensing regime. Given the somewhat fragmented nature of its licensing regime and historically limited general exceptions, there is scope for India’s regulatory architecture to be further streamlined to promote greater ease of doing business.

The U.S. export control regime is not without its own complexities and is also facing new challenges. For example, the Bureau of Industry and Security (BIS) is under-resourced and appears to be directing significant capacity towards enforcement in response to broader geopolitical pressures. Routine technology license approvals for partners such as India, appear to be consequentially slower.

Specific friction points in their respective export control regimes, highlighted during recent industry conversations, are also worth noting. For example, demonstration licenses—which allow companies to temporarily bring technology into a country to showcase to prospective partners—appear to be processed faster for U.S. companies entering India than for Indian companies entering the United States.¹ Notably, this delay seems to originate on the Indian regulatory side.

On the whole, it would make sense for U.S. and Indian government counterparts, namely the BIS and the Directorate General of Foreign Trade, along with the Ministry of External Affairs and the Ministry of Electronics and Information Technology, to engage in regular bilateral meetings focused specifically on export licensing alignment and the possible use of a pre-cleared or Validated End-User (VEU) mechanism. Such a mechanism, which allows vetted partners to receive specified controlled items without requiring a license for each individual transaction, could enable more predictable collaboration between trusted U.S. and Indian partners.

An Economic Case for Cooperation

A second friction point, perhaps less visible but more consequential, concerns the economic logic underpinning U.S.–India semiconductor cooperation. The strategic case—supply chain resilience, trusted partner diversification, and reduced dependency on East Asian manufacturing—has been articulated clearly and repeatedly. The economic case, i.e., how the partnership translates into concrete commercial returns for firms on both sides, would also need to be articulated clearly. The India Semiconductor Mission’s (ISM) first phase provided a commercial rationale for U.S. firms to treat India as an attractive investment destination. But as these firms weigh further expansion, the final contours of a successor incentive scheme will determine their top-up amounts and next tranches of investment, and those contours remain unsettled.

It is worth being precise about what India is and is not seeking. Currently, India is not pursuing full-stack resilience, and is instead oriented toward developing more legacy technology nodes to serve the requirements of its domestic automotive, aerospace, and consumer electronics industries, as well as its exports to emerging markets. From a U.S. investment standpoint, the greater advantage will lie in advanced nodes, an area where India does not yet have a competitive presence. The design segment is often cited as the area of most immediate mutual advantage, given that both countries bring existing strengths to it and that the barriers to collaboration are lower than in manufacturing.

That said, the mode of collaboration matters. Discussions related to the India–U.S. Defense Acceleration Ecosystem (INDUS-X) have previously suggested that co-production, where an Indian partner scales production alongside a foreign joint venture partner, is likely to be more viable than co-creation, which requires significant upfront capital and tolerance for uncertainty—something newer Indian semiconductor firms may not possess at the moment. A more sequenced approach, in which co-production generates revenues that Indian firms can then reinvest into longer-term co-creation projects, may be better suited to the current state of India’s industry. However, realizing that potential requires targeted regulatory guardrails and incentives that have not yet been put in place in a systematic way.

Two existing mechanisms are worth examining in this context. The International Technology Security and Innovation Fund under the U.S. Creating Helpful Incentives to Produce Semiconductors (CHIPS) and Science Act initiated a partnership with the ISM in September 2024, beginning with an assessment of India’s semiconductor ecosystem. The preliminary assessment phase appears to have been completed, but the programmatic or financial commitments expected to follow from it have not been publicly defined. This is a gap that would benefit from greater clarity from the U.S. side. On the Indian side, the proposed ISM 2.0 is reported to include a revamped Design Linked Incentive (DLI 2.0) scheme that would allow foreign firms to partner with Indian companies on semiconductor research and development, although the scheme has not yet been finalized. A related question worth examining, as the design takes shape, is whether a scheme structured around domestic capacity-building is the right vehicle for foreign partnerships, or whether a separate mechanism would better serve that purpose. How these questions are resolved will have a bearing on the scope of bilateral collaboration in the design segment.

Closed-door discussions with industry and academia have also underscored the need for both sides to independently map their economic interests, supply chain priorities, and areas of concern, and then identify genuine points of intersection. The emphasis needs to be on tangible and durable economic benefits rather than on expressions of political will. While the TRUST initiative could provide the institutional umbrella for such an exercise, what would give it substance is the analytical work to underpin it.

The “Second China” Question

Finally, a concern that has surfaced with some regularity in recent U.S.–India discussions,  including semiconductor-focused ones, is the notion that India could eventually mirror China’s trajectory as a technology-acquiring, supply chain-dominating strategic competitor. Indian industry stakeholders have been unambiguous in stating that India will not replicate this. Any technology partnership of this scale, however, benefits from a governance architecture designed with clear legal safeguards, and the U.S.–India one is no exception. This is not because India’s track record on technology security warrants any suspicion, but because durable partnerships are built on transparent frameworks rather than on assumptions of good faith alone.

Therefore, a more productive framing perhaps lies less in asking whether India can become another China and more in asking what kind of governance architecture could make the U.S.–India partnership robust enough to put such questions to rest. This architecture could include a shared framework for jointly generated intellectual property at both the pre-competitive and competitive stages, as well as mechanisms to ensure bilateral transparency on end-use.

While such friction points in U.S.–India semiconductor cooperation are real, none are intractable. Resolving them, however, requires quieter, technical work of alignment and political will on both sides.